1. Field of the Invention
The present invention generally relates to a method for fabricating devices on semiconductor substrates. More specifically, the present invention relates to a method of fabricating complementary metal oxide semiconductor (CMOS) field effect transistors on a semiconductor substrate.
2. Description of the Related Art
Integrated circuits (ICs) may include more than one million complementary metal oxide semiconductor (CMOS) field effect transistors that are formed on a semiconductor substrate and are wired together into circuits to perform various functions within the IC. A CMOS transistor comprises a gate structure disposed between source and drain regions that are formed in a semiconductor material. The gate structure generally comprises a gate electrode and a gate dielectric. The gate electrode is disposed over the gate dielectric and controls a flow of charge carriers in a channel region between the drain and source regions beneath the gate dielectric to turn the transistor on or off.
In high-speed and high device density ICs, conventional gate structures having polysilicon gate electrodes are inefficient because of a free carrier depletion layer in the polysilicon. In an ON state of the CMOS transistor, the depletion layer increases the effective thickness of the gate dielectric and, correspondingly, lowers capacitance of the gate structure, thereby degrading operational performance of the transistor.
For example, a lower gate capacitance negatively impacts the performance of the transistor. Specifically, high gate capacitance leads to a lower Vg-Vt (where Vg is the gate voltage and Vt is the threshold voltage) for the same number of on-state carriers and thus decreasing transistor power. Additionally, high gate capacitance also improves the scaling length of the device making it possible to build a smaller transistor, which has a faster switching speed.
In advanced CMOS transistors, gate structures may comprise silicide gate electrodes. In such gate structures, the polysilicon is converted to a silicide using a solid-state reaction with a metal or metallic alloy. A silicide is an compound of Si and a metal. Herein, materials are conventionally identified using their chemical formulas. In the gate structure, the silicide behaves like a metal and, as such, is able to eliminate the depletion effect.
However, it is desirable to have control over the effective work function of the metal-gate. The effective work function of the gate determines the threshold voltage of the transistor. A CMOS device is composed of two types of transistors; an n-type field effect transistor (nFET) and a p-type field effect transistor (pFET) each having a different threshold voltage and thus different workfunction. The workfunction of a metal is the energy necessary to remove an electron so that it is no longer bound to the metal (the energy difference between the vacuum level and Fermi level). For a CMOS device it is necessary to have dual metal gates with the appropriate workfunctions for each type of transistor.
Therefore, there is a need in the art for an improved method for fabricating CMOS field effect transistors in the manufacture of integrated circuits and for an improved method for controlling the work function of the metal-gate of a transistor.